1. Field of the Invention
The present invention relates to a "fast access", alternate-metal, virtual-ground (AMG) electrically-programmable read-only-memory (EPROM) and, in particular, to a fast access AMG EPROM with segment select transistors which have an increased width.
2. Discussion of the Related, Art
A "fast access", alternate-metal, virtual-ground (AMG) electrically-programmable read-only-memory (EPROM) is a non-volatile memory that, like conventional EPROMs and electrically-erasable programmable read-only-memories (EEPROMs), retains data which has been stored in the memory when power is removed and which, unlike conventional EPROMs and EEPROMs, uses a series of access transistors to contact the source bit lines of the array, and a series of segment select transistors to segment the array.
FIG. 1 shows a plan view that illustrates a portion of a conventional fast-access AMG EPROM array 10. As shown in FIG. 1, array 10 includes a series of memory cells 12, a series of access transistors 14, a series of segment select transistors 16, a series of metal bit line contacts MBL1-MBLn, and a series of field oxide regions FOX which isolate the access transistors 14, the segment select transistors 16, and the metal bit line contacts MBL1-MBLn.
In addition, the memory cells 12 in a row of memory cells share a common word line 18. As is well known, the portion of the word line 18 which is formed over each memory cell 12 in a row of memory cells functions as the control gate of the memory cells in that row. Similarly, the access transistors 14 in a row of access transistors and the segment select transistors 16 in a row of segment select transistors 16 share a common access select line 20 and a common segment line 22, respectively.
As also shown in FIG. 1, each memory cell 12 and each access transistor 14 in a column of memory cells and access transistors share a source bit line SOURCE and a drain bit line DRAIN with the remaining memory cells and access transistors in the column, and with the memory cells 12 and access transistors 14 in the horizontally-adjacent columns. In a conventional fast-access AMG EPROM, the metal bit lines typically contact the drain bit lines DRAIN via a segment select transistor 16 while, on the other hand, the source bit lines SOURCE are not contacted by a metal bit line.
Thus, as further shown in FIG. 1, in each row of segment select transistors 16, every second bit line is contacted by one segment select transistor 16. As a result, the maximum width of a segment select transistor, which has been fabricated with a 0.8 micron process, is defined by the distance D.sub.1, which represents the 3.4 micron pitch of two bit lines, less the distance D.sub.2, which represents the 1.7 micron isolation width that is required between adjacent segment select transistors 16. Therefore, since every other bit line is contacted by a segment select transistor 16, the maximum width of a segment select transistor 16 is limited by the isolation requirements of the adjacent cells.
One problem with utilizing segment select transistors 16, however, is that, due to the limited width of the transistors 16, the maximum current that can be driven by a segment select transistor 16 is typically less than the current which is required by the cells during programming. When less than the required programming current is provided, poor programming characteristics can result which, in turn, can lead to an erroneous value being read from the cell. Thus, there is a need for a fast-access AMG EPROM that incorporates segment select transistors which can drive the current required during programming and, at the same time, maintain the required isolation.